1. Technical Field
This disclosure relates to semiconductor fabrication and more particularly, to a method for silyation of semiconductor devices to reduce resist loss and more reliably provide critical dimension (CD) structures.
2. Description of the Related Art
As a result of technological improvements in semiconductor fabrication, aggressively shrinking device ground rules are needed to increase the productivity and efficiency of optical lithography processes. In semiconductor fabrication processes an anti-reflection coating (ARC) is formed prior to the formation of a resist layer. Thinning the resist to open up the lithographic process window has been the trend in conventional processes. Also, a thick ARC is employed to suppress substrate variations. However, critical dimensions and resist thickness loss during an ARC open process become more and more pronounced when thinner resist and thicker ARC are used.
The use of high oxygen or carbon monoxide flow in ARC open processes not only consumes a lot of resist, but also lateral etching due to oxygen will cause critical dimension loss. This is especially pronounced in processes which typically include a resist to ARC selectivity of about 1:1. This means that to open 100 nm of ARC, 100 nm of resist is consumed. For example, in a Dual Damascene (DD) process, the use of high oxygen flow to minimize "fences" in trench etching (via first) can introduce as large as a 60 nm etch bias (etch bias=after-etch critical dimension-before-etch critical dimension). (Fences are structures which protrude into an upper trench after etching the trench when a via is etched first and a trench second for the dual damascene structure.) Therefore, lithographers have to underexpose line/space patterns to address this problem, which significantly reduces the lithographic process window. Moreover, oxygen and/or carbon monoxide containing etch chemistries in the ARC open process usually increase scalloping of the resist, and/or resist pattern transfer irregularity. This significantly degrades the lithographic process window as well.
Therefore, a need exists for a method of protecting the resist and critical dimensions during an ARC open process. A further need exists for a method which permits the use of a relatively thin resist with a thicker ARC layer below the resist layer.